UNIT I
Data representation - Data types - complements, fixed point and floating point representation other binary codes - micro operations: Register transfer language, Register transfer, Bus and Memory transfer, Arithmetic, logic, and shift micro operations, Arithmetic logic shift unit - micro programmed control - control memory - Address sequencing - micro program example - design of control unit.
UNIT II
Central processing unit: General register and stack organizations, instruction formats - Addressing modes, Data transfer and manipulation - program control, RISC - Pipelining - Arithmetic and instruction, RISC pipeline - Vector processing and Array processors.
UNIT III
Computer Arithmetic - Addition and subtraction, Multiplication and division, floating point and decimal Arithmetic operations.
UNIT IV
Input-output organization - peripheral devices, I/O interface, Asynchronous data transfer, modes of transfer, priority interrupt, direct memory access, I/O processor, serial communications.
UNIT V
Memory organization - Memory hierarchy - main memory - Auxiliary memory - associative, cache and virtual memory, memory management hardware - multi processors: Interconnection structures, Inter processor arbitration.
Text Books
(i) M.M. Mano, 1993, Computer System architecture. PHI (Third Edition).
Reference Books
(i) V. C. Hamacher, G.Vranesic, S. G.Zaky-Computer Organiation, McGraw Hill.
(ii) J. P.Hayes, 1988, Computer architecture, McGraw Hill, ISE.
(iii) H. K, Briggs. F.A, 1988, Computer Architecture and Parallel Processing, McGraw-Hill ISE.
(iv) William Stallings, 2003, Computer Organization & Architecture, 6th dition,PHI, New Delhi.
Data representation - Data types - complements, fixed point and floating point representation other binary codes - micro operations: Register transfer language, Register transfer, Bus and Memory transfer, Arithmetic, logic, and shift micro operations, Arithmetic logic shift unit - micro programmed control - control memory - Address sequencing - micro program example - design of control unit.
UNIT II
Central processing unit: General register and stack organizations, instruction formats - Addressing modes, Data transfer and manipulation - program control, RISC - Pipelining - Arithmetic and instruction, RISC pipeline - Vector processing and Array processors.
UNIT III
Computer Arithmetic - Addition and subtraction, Multiplication and division, floating point and decimal Arithmetic operations.
UNIT IV
Input-output organization - peripheral devices, I/O interface, Asynchronous data transfer, modes of transfer, priority interrupt, direct memory access, I/O processor, serial communications.
UNIT V
Memory organization - Memory hierarchy - main memory - Auxiliary memory - associative, cache and virtual memory, memory management hardware - multi processors: Interconnection structures, Inter processor arbitration.
Text Books
(i) M.M. Mano, 1993, Computer System architecture. PHI (Third Edition).
Reference Books
(i) V. C. Hamacher, G.Vranesic, S. G.Zaky-Computer Organiation, McGraw Hill.
(ii) J. P.Hayes, 1988, Computer architecture, McGraw Hill, ISE.
(iii) H. K, Briggs. F.A, 1988, Computer Architecture and Parallel Processing, McGraw-Hill ISE.
(iv) William Stallings, 2003, Computer Organization & Architecture, 6th dition,PHI, New Delhi.
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