PAGING-BASIC METHOD

• Physical memory is broken into fixed sized blocks called Frames.
• Logical memory is also broken into blocks of the same size called pages.
• When a process is to be executed, its pages are located into any available memory frames from the backing store.
• The backing store is divided into fixed sized blocks that are of the same size as the memory frames.

Address generated by CPU is divided into:

•    1.  Page number (p) – used as an index into a page table which contains base address of each page   in physical memory.
•    2.  Page offset     (d) – combined with base address to define the physical memory address that is sent to the memory unit.

 Address translation Architecture:

• CPU--->Logical address (p,d)-->page table--->physical address(f,d)-->physical memory
• To record where each virtual page of the address space is placed in physical memory, the operating system usually keeps a per-process data structure known as a page table. 
• The major role of the page table is to store address translations for each of the virtual pages of the address space, thus letting us know where in physical memory each page resides.

Paging Model of Logical and Physical memory

• Logical Memory--->Page Table---->Physical Memory
• If the page containing the linear address is not currently in physical memory, the processor generates a page-fault exception (#14). 
• The exception handler for the page-fault exception typically directs the operating system to load the page from disk storage into physical memory. 
• When the page has been loaded in physical memory, a return from the exception handler causes the instruction that generated the exception to be restarted.
•  The information that the processor uses to map linear addresses into the physical address space and to generate page-fault exceptions (when necessary) is contained in page directories and page tables stored in memory.