SEGMENTATION WITH PAGING

• The page tables are segmented.
• Segments are divided into pages.
• Implementation requires STR(segment table register) and PMT(page map table).
• In this scheme, each virtual address consists of a segment number, page number within that segment and an offset within that page.
• The segment number indexes into segment table which yields the base address of the page table for that segment.
• The page number indexes into the page table,each of which entry is a page frame.
• Adding the PFN(page frame number) and the offset results in the physical address.
•  The Intel 386 uses segmentation with paging for memory  management with a two-level paging scheme.

ADDRESS TRANSLATION:

PHYSICAL ADDRESS=(S,P,W)

S-SEGMENT NO Which comes from the first partition segment table called as LDT (local descriptor table)
P-PAGE NO Which comes from the second partition  page table called as GDT(Global Descriptor Table)
W-PAGE SIZE